[IEEE 2017 Symposium on VLSI Circuits - Kyoto, Japan...

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[IEEE 2017 Symposium on VLSI Circuits - Kyoto, Japan (2017.6.5-2017.6.8)] 2017 Symposium on VLSI Circuits - FMAX/VMIN and noise margin impacts of aging on domino read, static write, and retention of 8T 1R1W SRAM arrays in 22nm high-k/metal-gate tri-gate CMOS

Kulkami, Jaydeep P., Tokunaga, Carlos, Cho, Minki, Khellah, Muhammad M., Tschanz, James W., De, Vivek K.
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Year:
2017
Language:
english
DOI:
10.23919/VLSIC.2017.8008571
File:
PDF, 2.46 MB
english, 2017
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