[IEEE 2018 IEEE International Symposium on Circuits and Systems (ISCAS) - Florence, Italy (2018.5.27-2018.5.30)] 2018 IEEE International Symposium on Circuits and Systems (ISCAS) - TMR Group Coding Method for Optimized SEU and MBU Tolerant Memory Design
Jin, Yi, Huan, Yuxiang, Chu, Haoming, Zou, Zhuo, Zheng, LirongYear:
2018
Language:
english
DOI:
10.1109/ISCAS.2018.8351105
File:
PDF, 3.26 MB
english, 2018