![](/img/cover-not-exists.png)
[IEEE 2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) - Taipei, Taiwan (2017.7.24-2017.7.26)] 2017 IEEE/ACM International Symposium on Low Power Electronics and Design (ISLPED) - A 32nm, 0.65–10GHz, 0.9/0.3 ps/σ TX/RX jitter single inductor digital fractional-n clock generator for reconfigurable serial I/O
Li, William Y., Kim, Hyung Seok, Chandrashekar, Kailash, Nguyen, Khoa, Ravi, AshokeYear:
2017
Language:
english
DOI:
10.1109/ISLPED.2017.8009160
File:
PDF, 555 KB
english, 2017