Extraction of DC-Biased SFQ Circuit Verilog Models

IEEE Transactions on Appiled Superconductivity 2018 / 9 Vol. 28; Iss. 6

Extraction of DC-Biased SFQ Circuit Verilog Models

Fourie, Coenrad J.
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Volume:
28
Language:
english
Journal:
IEEE Transactions on Applied Superconductivity
DOI:
10.1109/TASC.2018.2829776
Date:
September, 2018
File:
PDF, 872 KB
english, 2018
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