A New FPGA-Based Segmented Delay-Line DPWM with...

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IEEE Transactions on Power Electronics 2017

A New FPGA-Based Segmented Delay-Line DPWM with Compensation for Critical Path Delays

Cheng, Xin, Song, Ruifeng, Xie, Guangjun, Zhang, Yu, Zhang, Zhang
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Year:
2017
Language:
english
Journal:
IEEE Transactions on Power Electronics
DOI:
10.1109/TPEL.2017.2763750
File:
PDF, 815 KB
english, 2017
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