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A New FPGA-Based Segmented Delay-Line DPWM with Compensation for Critical Path Delays
Cheng, Xin, Song, Ruifeng, Xie, Guangjun, Zhang, Yu, Zhang, ZhangYear:
2017
Language:
english
Journal:
IEEE Transactions on Power Electronics
DOI:
10.1109/TPEL.2017.2763750
File:
PDF, 815 KB
english, 2017