Design of High Speed and Low Offset Dynamic Latch...

PLoS ONE 2014 / 10 Vol. 9; Iss. 10

Design of High Speed and Low Offset Dynamic Latch Comparator in 0.18 µm CMOS Process

Rahman, Labonnah Farzana, Reaz, Mamun Bin Ibne, Yin, Chia Chieu, Ali, Mohammad Alauddin Mohammad, Marufuzzaman, Mohammad, Lisesivdin, Sefer Bora
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Volume:
9
Language:
english
Journal:
PLoS ONE
DOI:
10.1371/journal.pone.0108634
Date:
October, 2014
File:
PDF, 6.03 MB
english, 2014
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