Finding the Energy Efficient Curve: Gate Sizing for Minimum...

VLSI Design 2011 Vol. 2011

Finding the Energy Efficient Curve: Gate Sizing for Minimum Power under Delay Constraints

Aizik, Yoni, Kolodny, Avinoam
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Volume:
2011
Year:
2011
Language:
english
Journal:
VLSI Design
DOI:
10.1155/2011/845957
File:
PDF, 1.75 MB
english, 2011
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