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High-Level Synthesis through metaheuristics and LUTs optimization in FPGA devices
Reyes Fernández de Bulnes, Darian, Dibene Simental, Juan Carlos, Maldonado, Yazmin, Trujillo, LeonardoVolume:
30
Language:
english
Journal:
AI Communications
DOI:
10.3233/AIC-170727
Date:
May, 2017
File:
PDF, 875 KB
english, 2017