Single bit-line 8T SRAM cell with asynchronous dual word-line control for bit -interleaved ultra-low voltage operation
Chiou, lih-Yih, Huang, Chi-RayLanguage:
english
Journal:
IET Circuits, Devices & Systems
DOI:
10.1049/iet-cds.2018.5150
Date:
August, 2018
File:
PDF, 1.40 MB
english, 2018