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[IEEE 2017 Symposium on VLSI Technology - Kyoto, Japan (2017.6.5-2017.6.8)] 2017 Symposium on VLSI Technology - Key process steps for high performance and reliable 3D Sequential Integration
Lu, C.-M. V., Deprat, F., Fenouillet-Beranger, C., Batude, P., Garros, X., Tsiara, A., Leroux, C., Gassilloud, R., Nouguier, D., Ney, D., Federspiel, X., Besombes, P., Toffoli, A., Romano, G., Rambal,Year:
2017
Language:
english
DOI:
10.23919/vlsit.2017.7998181
File:
PDF, 707 KB
english, 2017