Analysis of a temperature-dependent delay optimization...

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Journal of Computational Electronics 2018 / 9

Analysis of a temperature-dependent delay optimization model for GNR interconnects using a wire sizing method

Bhattacharya, Sandip, Das, Subhajit, Mukhopadhyay, Arnab, Das, Debaprasad, Rahaman, Hafizur
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Language:
english
Journal:
Journal of Computational Electronics
DOI:
10.1007/s10825-018-1251-4
Date:
September, 2018
File:
PDF, 4.00 MB
english, 2018
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