A 90-nm CMOS 800 MHz 2$$\times$$×VDD output buffer with...

Analog Integrated Circuits and Signal Processing 2018 / 11 Vol. 97; Iss. 2

A 90-nm CMOS 800 MHz 2$$\times$$×VDD output buffer with leakage detection and output current self-adjustment

Wang, Chua-Chin, Tsai, Tsung-Yi, Lin, Wei
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Volume:
97
Language:
english
Journal:
Analog Integrated Circuits and Signal Processing
DOI:
10.1007/s10470-018-1285-3
Date:
November, 2018
File:
PDF, 2.65 MB
english, 2018
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