500 MHz 90 nm CMOS 2 $$\times $$× VDD Digital Output Buffer...

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Circuits, Systems, and Signal Processing 2018 / 7

500 MHz 90 nm CMOS 2 $$\times $$× VDD Digital Output Buffer Immunity to Process and Voltage Variations

Wang, Chua-Chin, Tsai, Tsung-Yi, Deng, Yu-Lin, Lee, Tzung-Je
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Language:
english
Journal:
Circuits, Systems, and Signal Processing
DOI:
10.1007/s00034-018-0895-4
Date:
July, 2018
File:
PDF, 1.42 MB
english, 2018
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