Impacts of ESD Reliability by Different Layout Engineering in the 0.25-μm 60-V High-Voltage LDMOS Devices
Chen, Shen-Li, Lin, Chun-Ju, Yu-Ting, HuangVolume:
3
Language:
english
Journal:
Physical Sciences Reviews
DOI:
10.1515/psr-2016-0016
Date:
February, 2018
File:
PDF, 5.95 MB
english, 2018