Design Methodology for TFT Based Pseudo-CMOS Logic Array with Multi-Layer Interconnection Architecture and Optimization Algorithms
Zhao, Qinghang, Sun, Wenyu, Zhao, Jiaqing, Zhao, Jian, Yao, Hailong, Ho, Tsung-Yi, Guo, Xiaojun, Yang, Huazhong, Liu, YongpanYear:
2018
Language:
english
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DOI:
10.1109/TCAD.2018.2878185
File:
PDF, 929 KB
english, 2018