Design Exploration of SHA-3 ASIP for IoT on a 32-bit RISC-V...

Design Exploration of SHA-3 ASIP for IoT on a 32-bit RISC-V Processor

RAO, Jinli, AO, Tianyong, XU, Shu, DAI, Kui, ZOU, Xuecheng
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Volume:
E101.D
Language:
english
Journal:
IEICE Transactions on Information and Systems
DOI:
10.1587/transinf.2017icp0019
Date:
November, 2018
File:
PDF, 730 KB
english, 2018
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