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IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2018

Regularity-Aware Routability-Driven Macro Placement Methodology for Mixed-Size Circuits With Obstacles

Lin, Jai-Ming, Deng, You-Lun, Li, Szu-Ting, Yu, Bo-Heng, Chang, Li-Yen, Peng, Te-Wei
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Year:
2018
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/TVLSI.2018.2867833
File:
PDF, 3.59 MB
english, 2018
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