A CASE FOR HYBRID INSTRUCTION ENCODING FOR REDUCING CODE SIZE IN EMBEDDED SYSTEM-ON-CHIPS BASED ON RISC PROCESSOR CORES
Bakthavatsalam,Volume:
10
Language:
english
Journal:
Journal of Computer Science
DOI:
10.3844/jcssp.2014.411.422
Date:
March, 2014
File:
PDF, 284 KB
english, 2014