Hardware Constructions for Error Detection of...

  • Main
  • 2018
  • Hardware Constructions for Error Detection of...
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2018

Hardware Constructions for Error Detection of Number-Theoretic Transform Utilized in Secure Cryptographic Architectures

Sarker, Ausmita, Mozaffari-Kermani, Mehran, Azarderakhsh, Reza
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Year:
2018
Language:
english
Journal:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DOI:
10.1109/TVLSI.2018.2881097
File:
PDF, 795 KB
english, 2018
Conversion to is in progress
Conversion to is failed