A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable...

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IEEE Journal of Solid-State Circuits 2018

A 16-Gb, 18-Gb/s/pin GDDR6 DRAM With Per-Bit Trainable Single-Ended DFE and PLL-Less Clocking

Kim, Young-Ju, Kwon, Hye-Jung, Doo, Su-Yeon, Ahn, Minsu, Kim, Yong-Hun, Lee, Yong-Jae, Kang, Dong-Seok, Do, Sung-Geun, Lee, Chang-Yong, Cho, Gun-Hee, Park, Jae-Koo, Kim, Jae-Sung, Park, Kyungbae, Oh,
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Year:
2018
Language:
english
Journal:
IEEE Journal of Solid-State Circuits
DOI:
10.1109/JSSC.2018.2883395
File:
PDF, 5.14 MB
english, 2018
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