Designing efficient accelerator of depthwise separable...

  • Main
  • 2018 / 12
  • Designing efficient accelerator of depthwise separable...
Journal of Systems Architecture 2018 / 12

Designing efficient accelerator of depthwise separable convolutional neural network on FPGA

Ding, Wei, Huang, Zeyu, Huang, Zunkai, Tian, Li, Wang, Hui, Feng, Songlin
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Language:
english
Journal:
Journal of Systems Architecture
DOI:
10.1016/j.sysarc.2018.12.008
Date:
December, 2018
File:
PDF, 1.27 MB
english, 2018
Conversion to is in progress
Conversion to is failed