Power-Rail ESD Clamp Circuit with Parasitic-BJT and Channel...

IEICE Transactions on Electronics 2017 Vol. E100.C; Iss. 3

Power-Rail ESD Clamp Circuit with Parasitic-BJT and Channel Parallel Shunt Paths to Achieve Enhanced Robustness

WANG, Yuan, LU, Guangyi, WANG, Yize, ZHANG, Xing
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Volume:
E100.C
Year:
2017
Language:
english
Journal:
IEICE Transactions on Electronics
DOI:
10.1587/transele.e100.c.344
File:
PDF, 814 KB
english, 2017
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