[Communications in Computer and Information Science] VLSI Design and Test Volume 892 (22nd International Symposium, VDAT 2018, Madurai, India, June 28-30, 2018, Revised Selected Papers) || Optimal Transistor Sizing of Full-Adder Block to Reduce Standby Leakage Power
Rajaram, S., Balamurugan, N.B., Gracia Nirmala Rani, D., Singh, VirendraVolume:
10.1007/97
Year:
2019
Language:
english
DOI:
10.1007/978-981-13-5950-7_8
File:
PDF, 1.98 MB
english, 2019