A 290-mV, 7-nm Ultra-Low-Voltage One-Port SRAM Compiler...

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IEEE Journal of Solid-State Circuits 2019

A 290-mV, 7-nm Ultra-Low-Voltage One-Port SRAM Compiler Design Using a 12T Write Contention and Read Upset Free Bit-Cell

Sinangil, Mahmut E., Lin, Yen-Ting, Liao, Hung-Jen, Chang, Jonathan
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Year:
2019
Journal:
IEEE Journal of Solid-State Circuits
DOI:
10.1109/JSSC.2019.2895236
File:
PDF, 9 KB
2019
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