A Cross-level Verification Methodology for Digital IPs...

ACM Transactions on Design Automation of Electronic Systems 2019 / 03 Vol. 24; Iss. 3

A Cross-level Verification Methodology for Digital IPs Augmented with Embedded Timing Monitors

Vinco, Sara, Bombieri, Nicola, Pagliari, Daniele Jahier, Fummi, Franco, Macii, Enrico, Poncino, Massimo
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Volume:
24
Language:
english
Journal:
ACM Transactions on Design Automation of Electronic Systems
DOI:
10.1145/3308565
Date:
March, 2019
File:
PDF, 2.01 MB
english, 2019
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