IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2018 / 11 Vol. 37; Iss. 11
Symbolic Verification of Cache Side-Channel Freedom
Chattopadhyay, Sudipta, Roychoudhury, AbhikVolume:
37
Language:
english
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DOI:
10.1109/TCAD.2018.2858402
Date:
November, 2018
File:
PDF, 49 KB
english, 2018