Towards an Efficient Deep Pipelined Template-Based Architecture for Accelerating the Entire 2D and 3D CNNs on FPGA
Shen, Junzhong, Huang, You, Wen, Mei, Zhang, ChunyuanYear:
2019
Language:
english
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DOI:
10.1109/TCAD.2019.2912894
File:
PDF, 3.60 MB
english, 2019