Theoretical analysis and optimization of high-k dielectric layers for designing high-performance and low-power-dissipation nanoscale double-gate MOSFETs
Thriveni, G., Ghosh, KaustabLanguage:
english
Journal:
Journal of Computational Electronics
DOI:
10.1007/s10825-019-01353-z
Date:
May, 2019
File:
PDF, 3.21 MB
english, 2019