![](/img/cover-not-exists.png)
[IEEE 2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2019.4.22-2019.4.25)] 2019 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - 10-Bit SAR ADC With Novel Pseudo-Random Capacitor Switching Scheme
Hsu, Pai-Hsiang, Lee, Yueh-Ru, Hung, Chung-ChihYear:
2019
Language:
english
DOI:
10.1109/VLSI-DAT.2019.8741534
File:
PDF, 695 KB
english, 2019