A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a...

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IEEE Transactions on Circuits and Systems I: Regular Papers 2019

A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration

Zhou, Dadian, Briseno-Vidrios, Carlos, Jiang, Junning, Park, Chulhyun, Liu, Qiyuan, Soenen, Eric G., Kinyua, Martin, Silva-Martinez, Jose
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Year:
2019
Journal:
IEEE Transactions on Circuits and Systems I: Regular Papers
DOI:
10.1109/TCSI.2019.2925743
File:
PDF, 45 KB
2019
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