Input/output Buffer based Vedic Multiplier Design for...

Input/output Buffer based Vedic Multiplier Design for Thermal Aware Energy Efficient Digital Signal Processing on 28nm FPGA

Goswami, Kavita, Pandey, Bishwajeet, Hussaian, D. M. Akbar, Kumar, Tanesh, Kalia, Kartik
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Volume:
9
Language:
english
Journal:
Indian Journal of Science and Technology
DOI:
10.17485/ijst/2016/v9i10/88072
Date:
March, 2016
File:
PDF, 1.21 MB
english, 2016
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