[IEEE 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) - Lausanne, Switzerland (2019.7.15-2019.7.18)] 2019 16th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) - Power-Down Mode Verification for Hierarchical Analog Circuits
Neuner, Maximilian, Graeb, HelmutYear:
2019
Language:
english
DOI:
10.1109/smacd.2019.8795264
File:
PDF, 1.34 MB
english, 2019