[IEEE 2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID) - Delhi, NCR, India (2019.1.5-2019.1.9)] 2019 32nd International Conference on VLSI Design and 2019 18th International Conference on Embedded Systems (VLSID) - A Mismatch Resilient 16-Bit 20 MS/s Pipelined ADC
Mohapatra, Satyajit, Gupta, Hari Shanker, Mohapatra, Nihar Ranjan, Mehta, Sanjeev, Chowdhury, Arup Roy, Pandya, NishaYear:
2019
Language:
english
DOI:
10.1109/VLSID.2019.00071
File:
PDF, 3.24 MB
english, 2019