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[IEEE 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) - Boston, MA, USA (2019.6.2-2019.6.4)] 2019 IEEE Radio Frequency Integrated Circuits Symposium (RFIC) - A −40-dBc Integrated-Phase-Noise 45-GHz Sub-Sampling PLL with 3.9-dBm Output and 2.1% DC-to-RF Efficiency
Lee, Sangyeop, Takano, Kyoya, Hara, Shinsuke, Dong, Ruibing, Amakawa, Shuhei, Yoshida, Takeshi, Fujishima, MinoruYear:
2019
Language:
english
DOI:
10.1109/RFIC.2019.8701745
File:
PDF, 1.95 MB
english, 2019