Design of a Scalable Low-Power 1-bit Hybrid Full Adder for...

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Design of a Scalable Low-Power 1-bit Hybrid Full Adder for Fast Computation

Hasan, Mehedi, Hasan, Mehedi, Hossein, Md. Jobayer, Hossain, Mainul, Zaman, Hasan U., Islam, Sharnali
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Year:
2019
Journal:
IEEE Transactions on Circuits and Systems II: Express Briefs
DOI:
10.1109/TCSII.2019.2940558
File:
PDF, 651 KB
2019
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