[IEEE 2019 Symposium on VLSI Technology - Kyoto, Japan (2019.6.9-2019.6.14)] 2019 Symposium on VLSI Technology - Record Low Contact Resistivity (4.4×10 −10 Ω-cm 2 ) to Ge Using In-situ B and Sn Incorporation by CVD With Low Thermal Budget (≤400°C) and Without Ga
Lu, Fang-Liang, Tsai, Chung-En, Huang, Chih-Hsiung, Ye, Hung-Yu, Lin, Shih-Ya, Liu, C. W.Year:
2019
Language:
english
DOI:
10.23919/VLSIT.2019.8776581
File:
PDF, 2.35 MB
english, 2019