A test point selection approach for DC analog circuits with...

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Analog Integrated Circuits and Signal Processing 2019 / 11

A test point selection approach for DC analog circuits with large number of predefined faults

Khanlari, Masoumeh, Ehsanian, Mehdi
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Language:
english
Journal:
Analog Integrated Circuits and Signal Processing
DOI:
10.1007/s10470-019-01550-7
Date:
November, 2019
File:
PDF, 600 KB
english, 2019
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