An α-factor architecture for RS decoder implemented on...

Microprocessors and Microsystems 2019 / 11 Vol. 71

An α-factor architecture for RS decoder implemented on 90 nm CMOS technology for computer computing applications devices

Mageswari, N., Mahadevan, K., Kumar, R. Mohan
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Volume:
71
Language:
english
Journal:
Microprocessors and Microsystems
DOI:
10.1016/j.micpro.2019.102855
Date:
November, 2019
File:
PDF, 1.82 MB
english, 2019
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