Analytic modeling of breakdown voltage shift in the CMOS...

Solid-State Electronics 2020 / 02 Vol. 164

Analytic modeling of breakdown voltage shift in the CMOS buried multiple junction detector

Vidal de Negreiros da Silva, Thais Luana, Kleimann, Pascal, Pittet, Patrick, Lu, Guo-Neng
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Volume:
164
Language:
english
Journal:
Solid-State Electronics
DOI:
10.1016/j.sse.2019.107682
Date:
February, 2020
File:
PDF, 1.89 MB
english, 2020
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