A 4 bit highly energy and area efficient SC SAR ADC based...

  • Main
  • 2019 / 11
  • A 4 bit highly energy and area efficient SC SAR ADC based...

A 4 bit highly energy and area efficient SC SAR ADC based on a combinational technique with reduced reset energy

Ghoshal, Pranati, Dey, Chanchal, Sen, Sunit Kumar
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Journal:
Microsystem Technologies
DOI:
10.1007/s00542-019-04672-0
Date:
November, 2019
File:
PDF, 1.22 MB
2019
Conversion to is in progress
Conversion to is failed