![](/img/cover-not-exists.png)
A Self-Biased Low-Jitter Process-Insensitive Phase-Locked Loop for 1.25Gb/s-6.25Gb/s SerDes
YUAN, Hengzhou, GUO, Yang, LIU, Yao, LIANG, Bin, GUO, QianchengVolume:
27
Journal:
Chinese Journal of Electronics
DOI:
10.1049/cje.2018.02.003
Date:
September, 2018
File:
PDF, 1.13 MB
2018