A low-error, memory based fast binary logarithmic converter

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IEEE Transactions on Circuits and Systems II: Express Briefs 2019

A low-error, memory based fast binary logarithmic converter

Jana, Biswabandhu, Roy, Avishek Sinha, Saha, Goutam, Banerjee, Swapna
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Year:
2019
Journal:
IEEE Transactions on Circuits and Systems II: Express Briefs
DOI:
10.1109/TCSII.2019.2945336
File:
PDF, 744 KB
2019
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