Hardware architectures for PRESENT block cipher and their...

IET Circuits Devices & Systems 2019 / 10 Vol. 13; Iss. 7

Hardware architectures for PRESENT block cipher and their FPGA implementations

Pandey, Jai Gopal, Goel, Tarun, Karmakar, Abhijit
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Volume:
13
Journal:
IET Circuits, Devices & Systems
DOI:
10.1049/iet-cds.2018.5273
Date:
October, 2019
File:
PDF, 3.62 MB
2019
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