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[IEEE 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC) - Cuzco, Peru (2019.10.6-2019.10.9)] 2019 IFIP/IEEE 27th International Conference on Very Large Scale Integration (VLSI-SoC) - Exploring Logic Gates Layout to Improve the Accuracy of Circuit Reliability Estimation
Schvittz, Rafael, Soares, Leomar, Butzen, Paulo FranciscoYear:
2019
DOI:
10.1109/VLSI-SoC.2019.8920385
File:
PDF, 89 KB
2019