Design Considerations for Si- and Ge-Stacked Nanosheet...

IEEE Transactions on Electron Devices 2020 / 1 Vol. 67; Iss. 1

Design Considerations for Si- and Ge-Stacked Nanosheet pMOSFETs Based on Quantum Transport Simulations

Zhang, Shuo, Huang, Jun Z., Xie, Hao, Khaliq, Afshan, Wang, Dawei, Chen, Wenchao, Miao, Kai, Chen, Hongsheng, Yin, Wen-Yan
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Volume:
67
Journal:
IEEE Transactions on Electron Devices
DOI:
10.1109/TED.2019.2954308
Date:
January, 2020
File:
PDF, 3.22 MB
2020
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