Performance-aware predictive-model-based on-chip body-bias...

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Integration, the VLSI Journal 2020 / 1

Performance-aware predictive-model-based on-chip body-bias regulation strategy for an ULP multi-core cluster in 28 nm UTBB FD-SOI

Di Mauro, Alfio, Rossi, Davide, Pullini, Antonio, Flatresse, Philippe, Benini, Luca
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Language:
english
Journal:
Integration
DOI:
10.1016/j.vlsi.2019.12.006
Date:
January, 2020
File:
PDF, 16.03 MB
english, 2020
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