An efficient high speed squaring and multiplier...

Journal of Physics Conference Series 2020 / 01 Vol. 1432

An efficient high speed squaring and multiplier architecture using yavadunam sutra and bit reduction technique

Deepa, A, Marimuthu, C N, Murugesan, C
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Volume:
1432
Journal:
Journal of Physics: Conference Series
DOI:
10.1088/1742-6596/1432/1/012080
Date:
January, 2020
File:
PDF, 867 KB
2020
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