A Variation-Resilient Microprocessor With a Two-Level...

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IEEE Journal of Solid-State Circuits 2019

A Variation-Resilient Microprocessor With a Two-Level Timing Error Detection and Correction System in 28-nm CMOS

Hong, Cheng-Yao, Liu, Tsung-Te
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Year:
2019
Language:
english
Journal:
IEEE Journal of Solid-State Circuits
DOI:
10.1109/jssc.2019.2951692
File:
PDF, 2.07 MB
english, 2019
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