Compact Modeling of Graded N-Channel Independent Gate FET...

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Compact Modeling of Graded N-Channel Independent Gate FET with Underlaps, Spacer and S/D Straggle for Low Power Application

Chattopadhyay, Ankush, Bose, Chayanika, Sarkar, Chandan K.
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Language:
english
Journal:
Silicon
DOI:
10.1007/s12633-020-00424-2
Date:
March, 2020
File:
PDF, 2.97 MB
english, 2020
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