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Simulation study of an ultra-low specific on-resistance high-voltage pLDMOS with self-biased accumulation layer
Yi, Bo, Peng, Yi Feng, Zhao, Qing, Kong, MouFu, Cheng, JunJi, Huang, HaiMengVolume:
17
Year:
2020
Journal:
IEICE Electronics Express
DOI:
10.1587/elex.16.20190673
File:
PDF, 1.13 MB
2020